1. Field of the Invention
The present invention relates to apparatus and methods for adjusting constructive and destructive transfer functions of a differentially encoded phase shift keyed receiver for reducing inter-symbol interference in optical systems.
2. Description of the Prior Art
For an optical system with filters, the effective concatenated bandwidth of the filters induces intersymbol interference (ISI). The ISI causes distortion of the signal and reduces the decision quality (the ability to accurately detect if a bit is a logical “1” or “0”) at a receiver. This decision quality may be quantified by counting the number of error bits and dividing it by the total number of transmitted bits. The resulting ratio is called bit error ratio (BER). Another way of discussing the quality of the signal at the receiver involves translating the BER to a parameter called Q using the equation Q=20 log └√{square root over (2)}erfc−1(2 BER)┘ where erfc−1 is the inverse complementary error function. The distortion effect of ISI on signal quality may be viewed in a general way in a baseband eye diagram of the modulated signal where ISI causes the space between “1” and “0” symbol levels to be partially filled by the trailing and leading edges of the symbols.
Optical signals commonly use binary phase shift keyed (BPSK) modulation where data bits for logical “0” and “1” by modulating a carrier with a phase shifts of 0 and π radians. The logical “0” or “1” is decoded at the receiver by determining whether the detected signal is to the left or right of a vertical imaginary axis of a signal vector diagram, sometimes called an IQ diagram. A detector viewed as a polar detector determines whether the absolute value of the received phase is greater than π/2 for “0” and less than π/2 for “1”. A detector viewed as a rectangular detector determines whether the cosine of the phase of the signal is negative or positive for “0” or “1”.
The BPSK optical signals may use a differentially-encoded phase shift keyed (DeBPSK, or DPSK) modulation format. The DPSK modulation format encodes input data as the difference between two consecutive transmitted symbols. The input data is differentially pre-coded using the preceding symbol as a reference with an electrical “delay+add” function so that an input data bit of logical “0” or “1” is encoded as a change of carrier phase of 0 or π radians relative to the preceding bit. At the detector the process is reversed by comparing a current bit to the preceding bit.
The DPSK decoding function may be performed using a delay line interferometer (DLI) and a balanced detector. The interferometer works on the principle that two waves that coincide with the same phase will add to each other while two waves that have opposite phases will tend to cancel each other. The interferometer has an input port for receiving the optical signal and two output ports—a constructive output port for issuing the waves that add and a destructive output for issuing the waves that tend to cancel.
The delay line interferometer (DLI) for DPSK signals has an additional element of an internal delay difference between the two waves that is about equal to the symbol time T of the DPSK modulation. The constructive output port issues a signal Ec=E(t)+E(t−T) and the destructive output port issues a signal Ed=E(t)−E(t−T). The effect of the time T is to reverse the signals at the two output ports so that the waves add at the destructive output port and cancel at the constructive output port when consecutive bits differ by π radians. The difference between Ec and Ed can be detected with a direct detection intensity receiver to determine when there is a change in phase in the signal between two consecutive bits and thereby estimate the logical bits carried by the DPSK modulation.
It is an effect of this delay difference to impose a transfer function having a sinusoidal amplitude response (in the frequency domain) from the input port to each output port. The spectral period of a cycle of the transfer function, equal to 1/T, is termed the free spectral range (FSR). The sinusoidal width proportional to the FSR effectively limits the frequency band of the signals that can be passed from the DLI input to the constructive and destructive outputs. The phase of the frequency domain cycle of the transfer function is termed the FSR phase.
It is commonly believed that a DLI delay difference equal to the symbol time T, and an FSR equal to the inverse of the symbol time T, is desired in order to provide the best system performance (fewest data estimation errors) by maximizing the difference between the signals Ec and Ed at the constructive and destructive outputs. Considered by itself, a differential delay not equal to the symbol time T would be expected to degrade system performance because the current and preceding symbols are not exactly differentially compared.